Its is desired to generate the following three Boolean functions. $$\eqalign{ & {F_1} = a\,\overline b \,c + \overline a \,b\overline c + bc \cr & {F_2} = \,a\,\overline b \,c + ab + \overline a \,b\overline c \cr & {F_3} = \,\overline a \,\overline b \,\overline c + abc + \overline a c \cr} $$

By using an OR gate array as shown in figure where $${P_{1\,}}\,to\,{P_5}$$ are the product terms in one or more of the variables a, $$\overline a $$, b, $$\,\overline b $$, c and $$\overline c $$.

Each cell of a static Random Access Memory Contains

A 12-bit ADC is operating with a 1$$\mu $$ sec clock period and the total conversion time is seen to be 14 $$\mu $$ sec. The ADC must br of the

A 4-bit shift register, which shifts 1 bit to the right at every clock pulse, is intialized to values (1000) for (Q₀Q₁Q₂Q₃). The D input is derived from Q₀, Q₂ and Q₃ through two XOR gates as shown in figure.

(a) Write the 4-bit values (Q₀Q₁Q₂Q₃) after each clock pulse till the pattern (1000) reappears on (Q₀Q₁Q₂Q₃).

(b) To what values should the shift register be intialized so that the pattern (1001) occurs after the first clock pulse?