In CMOS technology, shallow P-well or N-well regions can be formed using

For the n-channel MOS transistor shown in the figure, the threshold voltage V_Th is 0.8V. Neglect channel length modulation effects. When the drain voltage V_D = 1.6 V, the drain current I_D was found to be 0.5 mA.

For the MOSFETs shown in the figure, the threshold voltage |V_t| = 2V and
K=$${1 \over 2}\mu {C_{OX}}\left( {{W \over L}} \right) = 0.1mA/{V^2}$$ . The value of I_D (in mA) is _______

The system of linear equations $$\left( {\matrix{ 2 & 1 & 3 \cr 3 & 0 & 1 \cr 1 & 2 & 5 \cr } } \right)\left( {\matrix{ a \cr b \cr c \cr } } \right) = \left( {\matrix{ 5 \cr { - 4} \cr {14} \cr } } \right)$$ has