In the figure the LED

For the digital block shown in Figure. 2(a), the output Y=f(S₃,S₂,S₁,S₀) where S₃ is MSB and S₀ is LSB. Y is given in terms of minterms as $$Y\, = \,\sum m\left( {1,5,6,7,11,12,13,15} \right)$$ and its complements $$\overline Y \, = \,\sum m\left( {0,2,3,4,8,9,10,14} \right)$$.

(a) Enter the logical values in the given Karnaugh map [figure2(b)] for the output Y.
(b) Write down the expression for Y in sum-of products from using minimum number of terms.
(c) Draw the circuit for the digital logic boxes using four 2-input NAND gates only for each of the boxes.

The digital block in the figure is realized using two positive edge triggered D flip-flops. Assume that for t < t₀, Q₁ = Q₂ =0. The circuit in the digital block is given by

The 2’s complement representation of –17 is