1
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
The digital block in the figure is realized using two positive edge triggered D flip-flops. Assume that for t < t0, Q1 = Q2 =0. The circuit in the digital block is given by

GATE ECE 2001 Digital Circuits - Sequential Circuits Question 51 English
A
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 51 English Option 1
B
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 51 English Option 2
C
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 51 English Option 3
D
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 51 English Option 4
2
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
In the figure the LED GATE ECE 2001 Digital Circuits - Logic Gates Question 16 English
A
emits light when both S1 and S2 are closed.
B
emits light when both S1 and S2 are open.
C
emits light when only S1 or S2 is closed.
D
does not emit light, irrespective of the switch positions.
3
GATE ECE 2001
MCQ (Single Correct Answer)
+1
-0.3
The 2’s complement representation of –17 is
A
01110
B
01111
C
11110
D
10001
4
GATE ECE 2001
MCQ (Single Correct Answer)
+1
-0.3
For the ring oscillator shown in the figure, the propagation delay of each inverter is 100 pico sec. What is the fundamental frequency of the oscillator output? GATE ECE 2001 Digital Circuits - Logic Gates Question 28 English
A
10 MHz
B
100 MHz
C
1 GHz
D
2 GHz