1
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
The digital block in the figure is realized using two positive edge triggered D flip-flops. Assume that for t < t0, Q1 = Q2 =0. The circuit in the digital block is given by

GATE ECE 2001 Digital Circuits - Sequential Circuits Question 43 English
A
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 43 English Option 1
B
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 43 English Option 2
C
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 43 English Option 3
D
GATE ECE 2001 Digital Circuits - Sequential Circuits Question 43 English Option 4
2
GATE ECE 2001
MCQ (Single Correct Answer)
+1
-0.3
The 2’s complement representation of –17 is
A
01110
B
01111
C
11110
D
10001
3
GATE ECE 2001
MCQ (Single Correct Answer)
+1
-0.3
For the ring oscillator shown in the figure, the propagation delay of each inverter is 100 pico sec. What is the fundamental frequency of the oscillator output? GATE ECE 2001 Digital Circuits - Logic Gates Question 26 English
A
10 MHz
B
100 MHz
C
1 GHz
D
2 GHz
4
GATE ECE 2001
MCQ (Single Correct Answer)
+2
-0.6
In the TTL circuit in Figure 2.11, $${S_0}$$ to $${S_0}$$ are select lines and $${X_7}$$ and $${X_0}$$are input lines. $${S_0}$$ and $${X_0}$$ are LSB'. The output Y is GATE ECE 2001 Digital Circuits - Combinational Circuits Question 35 English
A
indeterminate
B
A ⊕ B
C
$$\overline {A \oplus B} $$
D
$$\overline C \,(\overline {A \oplus B)} \, + C(A \oplus B)$$
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