1
GATE ECE 1988
Subjective
+8
-0
The circuit shown below uses TTL flip-flops. The flip-flops are triggered at the negative transitions of the clock. It is desired that when M = 1 the circuit should function as an up-counter (in 8421 BCD) and when M=0, as a down-counter. Design the combinational circuit interposed between the flip-flops so that the circuit works as desired. (i.e. find F as a function of Q,$$\overline Q $$, M, $$\overline M $$). GATE ECE 1988 Digital Circuits - Sequential Circuits Question 19 English
2
GATE ECE 1988
MCQ (Single Correct Answer)
+1
-0.3
For the circuit shown below the output Fis given by GATE ECE 1988 Digital Circuits - Logic Gates Question 33 English
A
F=1
B
F=0
C
F=X
D
F= $$\overline X $$
3
GATE ECE 1988
MCQ (Single Correct Answer)
+1
-0.3
Minimum number of 2-input NAND gates required to implement the function, f=($$\overline X $$+$$\overline Y $$)(Z+W) is
A
3
B
4
C
5
D
6
4
GATE ECE 1988
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of 2-input NAND gates required to implement the Boolean function Z=A$$\overline {B\,} $$C, assuming that A, B and C are available, is
A
two
B
three
C
five
D
six