Consider the unity negative feedback control system shown in the Figure. The value of gain $K(>0)$ at which the given system will remain marginally stable is $\_\_\_\_$ . (Answer in integer)

In the circuit shown in the Figure, $A$ and $B$ are logic inputs and $Y$ is the logic output. Which of the following logic operations is realized by the circuit?

A binary ripple counter is designed to count $(0)_{10}$ to $(64)_{10}$. Which of the following is/are the number of flip-flops required to design the counter?

The negative edge triggered $J K$ flip-flop in the Figure has $J$ and $K$ inputs tied to Logic High and a square wave of 10 cycles/second is applied to its clock $(C)$ input. The frequency of the output $Q$ (in cycles/second) is $\_\_\_\_$ .

(rounded off to two decimal places)