Choose the correct statements relating to the circuit of figure

A ripple counter using negative edge-triggered D-flip flops is shown in Fig.1. The flip-flops are cleared to '0' by a '0' at the R input. The feedback logic is to be designed to obtain the count sequence shown in the same figure. The correct feedback logic is:

Given that for a logic family,

$${V_{OH}}$$ is the minimum output high-level voltage
$${V_{OL}}$$ is the minimum output low-level voltage
$${V_{IH}}$$ is the minimum output high-level voltage and
$${V_{IL}}$$ is the minimum output low-level voltage.
The correct relationship is:

Fill in the blanks of the statements below concerning the following Logic Families:
Standard TTL (74XX), Low power TTL(74LXX) Low power schottky TTL(74LSXX), schottky TTL(74 SXXX), Emitter coupled Logic (ECL), CMOS

(a) Among the TTL Families, ________ family requires considerably less power than the standard TTL (74XX) and also has com parable proparation delay.
(b) Only the _______ family can operate over a wide range of power supply voltages.