GATE ECE 1987 | GATE ECE Year Wise Previous Years Questions

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GATE ECE 1987

MCQ (Single Correct Answer)

-0.6

In the signal flow graph shown in fig X₂= TX₁ where T is equal to

GATE ECE 1987 Control Systems - Signal Flow Graph and Block Diagram Question 8 English

2.5

5.5

GATE ECE 1987

MCQ (Single Correct Answer)

-0.3

A ripple counter using negative edge-triggered D-flip flops is shown in Fig.1. The flip-flops are cleared to '0' by a '0' at the R input. The feedback logic is to be designed to obtain the count sequence shown in the same figure. The correct feedback logic is: GATE ECE 1987 Digital Circuits - Sequential Circuits Question 12 English 1

GATE ECE 1987 Digital Circuits - Sequential Circuits Question 12 English 1

GATE ECE 1987 Digital Circuits - Sequential Circuits Question 12 English 2

$$F\, = \overline {{Q_2}{Q_1}\overline {{Q_0}} } $$

$$F\, = \,{Q_2}\,\overline {{Q_1}} \overline {{Q_0}} $$

$$F\, = \,\overline {{Q_2}} \overline {{Q_1}} {Q_0}$$

$$F\, = \,\overline {{Q_2}} \overline {{Q_1}} \overline {{Q_0}} $$

GATE ECE 1987

MCQ (Single Correct Answer)

-0.3

Choose the correct statements relating to the circuit of figure GATE ECE 1987 Digital Circuits - Sequential Circuits Question 8 English

For V_i = -2V, P=0

For V_i = +3V, P=0

For V_i = 0V, P=0 always

For V_i = 0V, P can be either 0 or 1.

GATE ECE 1987

Subjective

-0

A 2-input up/down synchrconous counter using two toggle flip-flops is shown in Fig.1. The counter's sequence is to be controlled by the input M as follows:
For M=1, sequence of Q₁, Q₀ is ..00, 01, 10, 11, 00, 01.......
For M=0, sequence of Q₁, Q₀ is ..00, 11, 10, 01, 00, 11......

(a)Design the necessary feedback logic for T₁ and T₀.

(b)Realize the feesback logic using inverters and 4-input multiplexers only. Use Q₁ and Q₀ as the control inputs of the multiplexer with Q₁ as the MSB.

GATE ECE 1987 Digital Circuits - Sequential Circuits Question 19 English

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