1
GATE ECE 1994
Subjective
+1
-0
Match the List-1 (type of 8-bit ADC) with List-2(Minimum conversion time in clock cycles)
A. Successive approximation
B. Dual-slope
C. Parallel Comparator
1) 1
2) 8
3) 16
4) 256
5) 512
List - 1
A. Successive approximation
B. Dual-slope
C. Parallel Comparator
List - 2
1) 1
2) 8
3) 16
4) 256
5) 512
2
GATE ECE 1994
Subjective
+10
-0
A Boolean function, F , given as sum of product (SOP) terms as F= $$\sum {} $$m(3,4,5,6) with A,B, and C as inputs. The function, F, can be expreeed on the Karnaugh's map shown below.
(1) What will be the minimized SOP expression for F?
(2) Implement this function on an 8 : 1 MUX.
3
GATE ECE 1994
Fill in the Blanks
+1
-0
A ring oscillator consisting of 5 inverters is running at a frequency of 1.0 MH$$_z$$. The progagation delay per gate is ______
4
GATE ECE 1994
True or False
+2
-0
If a pure resistance load, when connected to a lossless 75-ohm line, produces a VSWR of 3 on the line, then the load impedance can only be 25 ohms.
Paper analysis
Total Questions
Analog Circuits
8
Communications
2
Control Systems
9
Digital Circuits
7
Electromagnetics
9
Electronic Devices and VLSI
5
Engineering Mathematics
5
Microprocessors
1
Network Theory
8
Signals and Systems
6
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