1
GATE ECE 1992
MCQ (Single Correct Answer)
+1
-0.3
The initial contents of the 4-bit serial-in-parallel-out, right-shift, Shift Register shown in figure is 0110. After three clock pulses are applied, the contents of the Shift Register will be GATE ECE 1992 Digital Circuits - Sequential Circuits Question 69 English
A
0000
B
0101
C
1010
D
1111
2
GATE ECE 1992
MCQ (More than One Correct Answer)
+1
-0
Choose the correct satatement(s) from the following:
A
PROM contains a programmable AND array and a fixed OR array.
B
PLA contains a fixed AND array and a programmable OR array
C
PROM contains a fixed AND array and a programmable OR array
D
PLA contains a programmable AND array and a programmable OR array
3
GATE ECE 1992
MCQ (Single Correct Answer)
+1
-0.3
The figure shows the circuit of a gate in the Resistor Transistor Logic (RTL) family. The circuit represents a GATE ECE 1992 Digital Circuits - Logic Families Question 23 English
A
NAND
B
AND
C
NOR
D
OR
4
GATE ECE 1992
Subjective
+8
-0
A new clocked "X-Y" flip-flop is defined with two inputs, X and Y in addition to the clock input. The flip-flop functions as follows:

If XY=00, the flip-flop changes stage with each clock pulse.

If XY=01, the flip-flop state Q becomes 1 with the next clock pulse.

If XY=10, the flip-flop state Q becomes 0 with the next clock pulse.

If XY=11, no change of state occurs with the clock pulse.

(a) Write the Truth table for the X-Y flip flop

(b) Write the Excitation table for the X-Y flip flop

(c) It is desired to convert a J-K flip flop into the X-Y flip flop by adding some external gates, if necessary. Draw a circuit to show how you will implement the X-Y flip-flop using a J-K flip-flop.

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