The initial contents of the 4-bit serial-in-parallel-out, right-shift, Shift Register shown in figure is 0110. After three clock pulses are applied, the contents of the Shift Register will be

The figure shows the circuit of a gate in the Resistor Transistor Logic (RTL) family. The circuit represents a

A combinational circuit has three inputs A, B and C and an output F. F is true only for the following input combinations?

A is false and B is true
A is false and C is true
A, B and C are all false
A, B and C are all true.

(a)Write the truth table for F. use the convention, true = 1 and false = 0.
(b)Write the simplified expression for F as a Sum of Products.
(c) Write the simplified expression for F as a product of Sums.
(d) Draw a logic circuit implementation of F using the minimum number of 2 input NAND gates only.

A new clocked "X-Y" flip-flop is defined with two inputs, X and Y in addition to the clock input. The flip-flop functions as follows:

If XY=00, the flip-flop changes stage with each clock pulse.

If XY=01, the flip-flop state Q becomes 1 with the next clock pulse.

If XY=10, the flip-flop state Q becomes 0 with the next clock pulse.

If XY=11, no change of state occurs with the clock pulse.

(a) Write the Truth table for the X-Y flip flop

(b) Write the Excitation table for the X-Y flip flop

(c) It is desired to convert a J-K flip flop into the X-Y flip flop by adding some external gates, if necessary. Draw a circuit to show how you will implement the X-Y flip-flop using a J-K flip-flop.