1
GATE EE 2008
+2
-0.6
The state space equation of a system is described by $$\mathop X\limits^ \bullet = AX + BU,\,\,Y = Cx$$ where $$X$$ is state vector, $$U$$ is input, $$Y$$ is output and $$A = \left( {\matrix{ 0 & 1 \cr 0 & { - 2} \cr } } \right)\,\,B = \left( {\matrix{ 0 \cr 1 \cr } } \right)\,\,C = \left[ {\matrix{ 1 & 0 \cr } } \right]$$$The transfer function $$G(s)$$ of this system will be A $${s \over {\left( {s + 2} \right)}}$$ B $${{s + 1} \over {s\left( {s - 2} \right)}}$$ C $${s \over {\left( {s - 2} \right)}}$$ D $${1 \over {s\left( {s + 2} \right)}}$$ 2 GATE EE 2008 MCQ (Single Correct Answer) +2 -0.6 The state space equation of a system is described by $$\mathop X\limits^ \bullet = AX + BU,\,\,Y = Cx$$ where $$X$$ is state vector, $$U$$ is input, $$Y$$ is output and $$A = \left( {\matrix{ 0 & 1 \cr 0 & { - 2} \cr } } \right)\,\,B = \left( {\matrix{ 0 \cr 1 \cr } } \right)\,\,C = \left[ {\matrix{ 1 & 0 \cr } } \right]$$$

A unity feedback is provided to the above system $$G(s)$$ to make it a closed loop system as shown in figure.

For a unit step input $$r(t),$$ the steady state error in the input will be

A
$$0$$
B
$$1$$
C
$$2$$
D
$$\infty$$
3
GATE EE 2008
+2
-0.6
A $$3$$ line to $$8$$ line decoder, with active low outputs, is used to implement a $$3$$- variable Boolean function as shown in the figure: The simplified form of Boolean function $$F(X,Y,Z)$$ implemented in 'Product of Sum' form will be
A
$$\left( {x + z} \right).\left( {\overline x + \overline y + \overline z } \right).\left( {y + z} \right)$$
B
$$\left( {\overline x + \overline z } \right).\left( {x + y + z} \right).\left( {\overline y + \overline z } \right)$$
C
$$\left( {\overline x + \overline y + z} \right).\left( {\overline x + y + z} \right).\left( {x + \overline y + z} \right).\left( {x + y + \overline z } \right)$$
D
$$\left( {\overline x + \overline y + \overline z } \right).\left( {\overline x + y + \overline z } \right).\left( {x + y + z} \right).\left( {x + \overline y + \overline z } \right)$$
4
GATE EE 2008
+1
-0.3
An input device is interfaced with Intel $$8085$$ $$A$$ microprocessor as memory mapped $${\rm I}/O,$$ the address of the device is $$2500H.$$ In order to input data from the device to accumulator, the sequence of instructions will be
A
\eqalign{ & LX{\rm I}\,\,\,H,2500H \cr & \,\,\,\,MOV\,\,A,M \cr}
B
\eqalign{ & LX{\rm I}\,\,\,H,2500H \cr & \,\,\,\,MOV\,\,M,A \cr}
C
\eqalign{ & LHLD\,\,\,2500H \cr & \,\,\,\,MOV\,\,A,M \cr}
D
\eqalign{ & LHLD\,\,\,2500H \cr & \,\,\,\,MOV\,\,M,A \cr}
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