In figure, the Boolean expression for the output in terms of inputs A, B and C when the clock ‘CK’ is high, is given by _______.

The CMOS equivalent of the following n MOS gate (figure) is ________ (draw the circuit ).

A SR FLIP-FLOP can be converted into a T FLIP-FLOP by connecting ___ to Q and ___ to $$\overline Q $$.

The four variable function f is given in terms of min-terms as: f (A B C D ) = $$\sum {} $$m (2,3,8,10,11,12,14,15 .) Using the K-map minimize the function in the sum of products form. Also, given the realization using only two-input NAND gates .