1
GATE EE 2005
MCQ (Single Correct Answer)
+2
-0.6
Consider the inverting amplifier, using an ideal operational amplifier shown in figure. The designer wishes to realize the input resistance seen by the small signal source to be as large as possible, while keeping the voltage gain between $$–10$$ and $$–25.$$ the upper limit on $${R_F}$$ is $$1\,M\Omega .$$ The value of $${R_1}$$ should be
![GATE EE 2005 Analog Electronics - Operational Amplifier Question 32 English](https://gateclass.cdn.examgoal.net/DQPAknrVPX2HNSWG4/4rZB5EL1r06s0Z5KSYFWZlQZPtFuP/6SpLB9WxJuXso984U8uZPX/uploadfile.jpg)
2
GATE EE 2005
MCQ (Single Correct Answer)
+2
-0.6
In the given figure, if the input is a sinusoidal signal, the output-will appear as shown
![GATE EE 2005 Analog Electronics - Operational Amplifier Question 31 English 1](https://imagex.cdn.examgoal.net/XdXLYrFUqfJyNpoiM/5F92gucskJl15sDrUPWjDkGROiVwG/OFSykhRtBABJF4QIQF3N81/uploadfile.jpg)
![GATE EE 2005 Analog Electronics - Operational Amplifier Question 31 English 2](https://imagex.cdn.examgoal.net/bIv7SlHx0oD0R7704/7PjHYYO0onutlfUqrErzeidyhuj2D/sb4Ks2oUWzCYceuR9tHdGk/uploadfile.jpg)
3
GATE EE 2005
MCQ (Single Correct Answer)
+2
-0.6
The typical frequency response of a two-stage direct coupled voltage amplifier is as shown in figure
4
GATE EE 2005
MCQ (Single Correct Answer)
+2
-0.6
When subjected to a unit step input, the closed loop control system shown in the figure will have a steady state error of
![GATE EE 2005 Control Systems - Time Response Analysis Question 17 English](https://gateclass.static.cdn.examgoal.net/XZVrVkWcC45t1dS8C/DqRaFmve0D2DAozj2kHTg2paUVDAe/xZE7rHaSRV4qrRnfgmbIhL/uploadfile.jpg)
Paper analysis
Total Questions
Analog Electronics
8
Control Systems
9
Digital Electronics
6
Electric Circuits
9
Electrical and Electronics Measurement
7
Electrical Machines
13
Engineering Mathematics
10
Power Electronics
7
Power System Analysis
10
Signals and Systems
6
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