The output $$Y$$ of the logic circuit given below is

A two-bit counter circuit is shown below

It the state $${Q_A}{Q_B}$$ of the counter at the clock time $${t_n}$$ is $$'10'$$ then the state $${Q_A}{Q_B}$$ of the counter at $${t_n} + 3$$ (after three clock cycles) will be

A portion of the main program to call a subroutine $$SUB$$ in an $$8085$$ environment is given below:
$$\eqalign{ & LXI\,\,\,\,\,\,\,\,\,\,\,\,\,D\,\,\,DISP \cr & LP\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,CALL\,\,\,SUB \cr} $$

It is desired that control be returned to $$LP+DISP+3$$ when the $$RET$$ instruction is executed in the subroutine. The set of instructions that precede the $$RET$$ instruction in the subroutine are

In the circuit given below, the value of R required for the transfer of maximum power to the load having a resistance of 3 Ω is