1
GATE EE 2011
MCQ (Single Correct Answer)
+1
-0.3
The output $$Y$$ of the logic circuit given below is GATE EE 2011 Digital Electronics - Combinational Circuits Question 16 English
A
$$1$$
B
$$0$$
C
$$X$$
D
$$\overline X $$
2
GATE EE 2011
MCQ (Single Correct Answer)
+2
-0.6
A two-bit counter circuit is shown below GATE EE 2011 Digital Electronics - Sequential Circuits Question 15 English

It the state $${Q_A}{Q_B}$$ of the counter at the clock time $${t_n}$$ is $$'10'$$ then the state $${Q_A}{Q_B}$$ of the counter at $${t_n} + 3$$ (after three clock cycles) will be

A
$$00$$
B
$$01$$
C
$$10$$
D
$$11$$
3
GATE EE 2011
MCQ (Single Correct Answer)
+2
-0.6
A portion of the main program to call a subroutine $$SUB$$ in an $$8085$$ environment is given below:
$$\eqalign{ & LXI\,\,\,\,\,\,\,\,\,\,\,\,\,D\,\,\,DISP \cr & LP\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,CALL\,\,\,SUB \cr} $$

It is desired that control be returned to $$LP+DISP+3$$ when the $$RET$$ instruction is executed in the subroutine. The set of instructions that precede the $$RET$$ instruction in the subroutine are

A
$$\eqalign{ & POP\,\,\,D \cr & DAD\,\,\,H \cr & PUSH\,\,\,D \cr} $$
B
$$\eqalign{ & POP\,\,\,H \cr & DAD\,\,\,D \cr & INX\,\,\,H \cr & INX\,\,\,H \cr & INX\,\,\,H \cr & PUSH\,\,\,H \cr} $$
C
$$\eqalign{ & POP\,\,\,H \cr & DAD\,\,\,D \cr & PUSH\,\,\,H \cr} $$
D
$$\eqalign{ & XTHL \cr & INX\,\,\,D \cr & INX\,\,\,D \cr & INX\,\,\,D \cr & XTHL \cr} $$
4
GATE EE 2011
MCQ (Single Correct Answer)
+1
-0.3
In the circuit given below, the value of R required for the transfer of maximum power to the load having a resistance of 3 Ω is GATE EE 2011 Electric Circuits - Network Theorems Question 31 English
A
zero
B
3 Ω
C
6 Ω
D
infinity
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