1
MHT CET 2024 3rd May Evening Shift
MCQ (Single Correct Answer)
+1
-0

The combination of NAND gates is shown in figure (I) and (II). For the given inputs, the outputs in both the combinations are respectively.

MHT CET 2024 3rd May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 82 English

A
0, 0
B
0, 1
C
1, 0
D
1, 1

MHT CET Papers

All year-wise previous year question papers