For a dual $$ADC$$ type $$3\,{\raise0.5ex\hbox{$\scriptstyle 1$} \kern-0.1em/\kern-0.15em \lower0.25ex\hbox{$\scriptstyle 2$}}$$ digit $$DVM$$, the reference voltage is $$100$$ $$mV$$ and the first integration time is set to $$300$$ $$ms$$. For some input voltage, the ''deintegration'' period is $$370.2ms.$$ The $$DVM$$ will indicate.

The logic function $$F = AC + ABD + ACD$$ is to be realized using an $$8$$ to $$1$$ multiplexer shown in figure, using $$A, C$$ and $$D$$ as control inputs.

$$(a)$$ Indicate the inputs to be applied at the terminals $$0$$ to $$7.$$
$$(b)$$ Can the function be realize using a $$4$$ to $$1$$ multiplexer?
State YES or NO.

The logic function $$f = \overline {\left( {x.\overline y } \right) + \left( {\overline x .y} \right)} $$ is the same as

For a flip-flop formed from two $$NAND$$ gates as shown in figure. The unusable state corresponds to