In an $$8085$$ $$A$$ microprocessor based system, it is desired to increment the contents of memory location whose address is available in $$(D,E)$$ register pair and store the result in same location. The sequence of instructions is

$$A,B,C$$ and $$D$$ are input bits, and $$Y$$ is the output bit in the $$XOR$$ gate circuit of the figure below. Which of the following statements about the sum $$S$$ of $$A,B,C,D$$ and $$Y$$ is correct?

A $$3$$ $$V$$ $$dc$$ supply with an internal resistance of $$2$$ $$\Omega $$ supplies a passive non-linear resistance characterized by the relation $${V_{NL}} = {{\rm I}^2}{}_{NL}$$. The power dissipated in the non-linear resistance is

The matrix $$A$$ given below is the node incidence matrix of a network. The columns correspond to braches of the network while the rows correspond to nodes. Let
$$V = {\left[ {{v_1}\,\,{v_2}....{v_6}} \right]^T}$$ denote the vector of branches voltages while
$${\rm I} = {\left[ {{i_1}\,{i_2}....{i_6}} \right]^T}$$ that of branch currents. The vector $$E = {\left[ {{e_1}\,{e_2}\,\,{e_3}\,{e_4}} \right]^T}$$ denotes the vector of node voltages relative to a common ground. $$$A = \left[ {\matrix{ 1 & 1 & 1 & 0 & 0 & 0 \cr 0 & { - 1} & 0 & { - 1} & 1 & 0 \cr { - 1} & 0 & 0 & 0 & { - 1} & { - 1} \cr 0 & 0 & { - 1} & 1 & 0 & 1 \cr } } \right]$$$

Which of the following statements is true?