GATE EE 2007 | GATE EE Year Wise Previous Years Questions

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

The system shown in figure below GATE EE 2007 Control Systems - Block Diagram and Signal Flow Graph Question 3 English 1

can be reduced to the form GATE EE 2007 Control Systems - Block Diagram and Signal Flow Graph Question 3 English 2

With

$$X = {C_0}s + {C_1},\,\,Y = 1/\left( {{s^2} + {a_0}s + {a_1}} \right),\,z = {b_0}s + {b_1}$$

$$X = 1,\,\,Y = \left( {{c_0}s + {c_1}} \right)/\left( {{s^2} + {a_0}s + {a_1}} \right),\,z = {b_0}s + {b_1}$$

$$X = {C_1}s + {C_0},\,\,Y = \left( {{b_1}s + {b_0}} \right)/\left( {{s^2} + {a_1}s + {a_0}} \right),\,z = 1$$

$$X = {C_1}s + {C_0},\,\,Y = 1/\left( {{s^2} + {a_1}s + {a_0}} \right),\,z = {b_1}s + {b_0}$$

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

The associated figure shows the two types of rotate right instruction $${R_1},\,{R_2}$$ available in a microprocessor where Register is a $$8$$-bit register and $$C$$ is the carry bit. The rotate left instructions $$L1$$ and $$L2$$ are similar except that $$C$$ now links the most significant bit of Register instead of the least significant one. GATE EE 2007 Digital Electronics - Microprocessor Question 10 English

GATE EE 2007 Digital Electronics - Microprocessor Question 10 English

Such a division can be correctly performed by the following set of operations

$$L2,R2,R1$$

$$L2, R1, R2$$

$$R2, L1, R1$$

$$R1, L2, R2$$

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

GATE EE 2007 Digital Electronics - Microprocessor Question 11 English

Suppose Register contains the $$2's$$ complement number $$11010110.$$ If this number is delivered by $$2$$ the answer should be

$$01101011$$

$$10010101$$

$$11101001$$

$$11101011$$

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

Which one of the following statements regarding the $$INT$$ (interrupt) and the $$BRQ$$ (bus request) pins in a $$CPU$$ is true?

The $$BRQ$$ pin is sampled after every instruction cycle, but the $$INT$$ is sampled after every machine cycle

Both $$INT$$ and $$BRQ$$ are sampled after every machine cycle

The $$INT$$ pin is sampled after every instruction cycle, but the $$BRQ$$ is sampled after every machine cycle

Both $$INT$$ and $$BRQ$$ are sampled after every instruction cycle

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