GATE EE 2007 | GATE EE Year Wise Previous Years Questions

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

Which one of the following statements regarding the $$INT$$ (interrupt) and the $$BRQ$$ (bus request) pins in a $$CPU$$ is true?

The $$BRQ$$ pin is sampled after every instruction cycle, but the $$INT$$ is sampled after every machine cycle

Both $$INT$$ and $$BRQ$$ are sampled after every machine cycle

The $$INT$$ pin is sampled after every instruction cycle, but the $$BRQ$$ is sampled after every machine cycle

Both $$INT$$ and $$BRQ$$ are sampled after every instruction cycle

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

In an $$8085$$ $$A$$ microprocessor based system, it is desired to increment the contents of memory location whose address is available in $$(D,E)$$ register pair and store the result in same location. The sequence of instructions is

$$XCHG,\,\,INR\,\,\,M$$

$$XCHG,\,\,INX\,\,\,H$$

$$INX\,\,D,\,\,XCHG$$

$$INR\,\,M,\,\,XCHG$$

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

$$A,B,C$$ and $$D$$ are input bits, and $$Y$$ is the output bit in the $$XOR$$ gate circuit of the figure below. Which of the following statements about the sum $$S$$ of $$A,B,C,D$$ and $$Y$$ is correct? GATE EE 2007 Digital Electronics - Logic Gates Question 2 English

GATE EE 2007 Digital Electronics - Logic Gates Question 2 English

$$S$$ is always either zero or odd

$$S$$ is always either zero or even

$$S=1$$ only if the sum of $$A,B,C$$ and $$D$$ is even

$$S=1$$ only if the sum of $$A,B,C$$ and $$D$$ is odd

GATE EE 2007

MCQ (Single Correct Answer)

-0.6

A $$3$$ $$V$$ $$dc$$ supply with an internal resistance of $$2$$ $$\Omega $$ supplies a passive non-linear resistance characterized by the relation $${V_{NL}} = {{\rm I}^2}{}_{NL}$$. The power dissipated in the non-linear resistance is

$$1.0$$ $$W$$

$$1.5$$ $$W$$

$$2.5$$ $$W$$

$$3.0$$ $$W$$

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