1
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
A single - phase inverter is operated in $$PWM$$ mode generating a single - pulse of width $$2d$$ in the center of each half cycle as shown in figure. It is found that the output voltage is free from $${5^{th}}$$ harmonic for pulse width $${144^0}.$$ What will be percentage of $${3^{rd}}$$ harmonic present in the output voltage $$\,\left( {{V_{03}}/{V_{01\,\,\,\max }}} \right)?$$ GATE EE 2007 Power Electronics - Inverters Question 18 English
A
$$0.0\% $$
B
$$19.6\,\,\% $$
C
$$31.7\,\,\% $$
D
$$53.9\,\,\% $$
2
GATE EE 2007
MCQ (Single Correct Answer)
+1
-0.3
''Six $$MOSFETS$$ connected in a bridge configuration (having no other power device) MUST be operated as Voltage Source Inverter $$(VSI)''.$$ This statement is
A
True, because being majority carrier devices. $$MOSFETS$$ are voltage driven
B
True, because $$MOSFETs$$ have inherently anti - parallel diodes
C
False, because it can be operated both as Current Source Inverter $$(CSI)$$ or a $$VSI$$
D
False, because $$MOSFETs$$ can be operated as execellent constant current sources in the saturation region
3
GATE EE 2007
MCQ (Single Correct Answer)
+1
-0.3
A three - phase fully - controlled thyristor bridge converter is used as line commuted inverter to feed $$50kW$$ power $$420$$ $$V$$ $$dc$$ to a three phase, $$415$$ $$V$$ (line), $$50$$ $$Hz$$ $$ac$$ mains, Consider $$dc$$ link current to be constant. The $$rms$$ current of the thyristor is
A
$$119.05$$ $$A$$
B
$$79.37$$ $$A$$
C
$$68.73$$ $$A$$
D
$$39.68$$ $$A$$
4
GATE EE 2007
MCQ (Single Correct Answer)
+2
-0.6
The circuit in the figure is current commutated $$dc$$ $$-$$ $$dc$$ chopper where, $$T{h_M}$$ is the main $$SCR$$ and $$T{h_AUX}$$ is the auxiliary $$SCR$$. The load current is constant at $$10$$ $$A.$$
$$T{h_M}$$ is $$ON$$
$$T{h_AUX}$$ is trigged at $$t=0.$$ $$T{h_M}$$ is turned $$OFF$$ between. GATE EE 2007 Power Electronics - Choppers and Commutation Techniques Question 13 English
A
$$0{\mkern 1mu} {\mkern 1mu} \mu s < t \le 25{\mkern 1mu} {\mkern 1mu} \mu s$$
B
$$25{\mkern 1mu} {\mkern 1mu} \mu s < t \le 50{\mkern 1mu} {\mkern 1mu} \mu s$$
C
$$50{\mkern 1mu} {\mkern 1mu} \mu s < t \le 75{\mkern 1mu} {\mkern 1mu} \mu s$$
D
$$75{\mkern 1mu} {\mkern 1mu} \mu s < t \le 100{\mkern 1mu} {\mkern 1mu} \mu s$$
EXAM MAP