1
GATE EE 2006
MCQ (Single Correct Answer)
+2
-0.6
A TTL NOT gate circuit is shown in figure. Assuming $${V_{BE}} = 0.7\,v$$ of both the transistors, if $${V_i} = 3.0\,V,$$ then the states of the two transistors will be GATE EE 2006 Digital Electronics - Logic Families and Memories Question 1 English
A
$${Q_1}\,\,ON$$ and $${Q_2}\,\,OFF$$
B
$${Q_1}$$ reverse $$\,\,ON$$ and $${Q_2}\,\,OFF$$
C
$${Q_1}$$ reverse $$\,\,ON$$ and $${Q_2}\,\,ON$$
D
$${Q_1}\,\,OFF$$ and $${Q_2}$$ reverse $$\,\,ON$$
2
GATE EE 2006
MCQ (Single Correct Answer)
+2
-0.6
A $$4 \times 1\,\,MUX$$ is used to implement a $$3$$- input Boolean function as shown in figure. The Boolean function $$F\left( {A,\,\,B,\,\,C} \right)$$ implemented is GATE EE 2006 Digital Electronics - Combinational Circuits Question 3 English
A
$$F\left( {A,\,\,B,\,\,C} \right) = \sum \left( {1,\,\,2,\,\,4,\,\,6} \right)$$
B
$$F\left( {A,\,\,B,\,\,C} \right) = \sum \left( {1,\,\,2,\,\,6} \right)$$
C
$$F\left( {A,\,\,B,\,\,C} \right) = \sum \left( {2,\,\,4,\,\,5,\,\,6} \right)$$
D
$$F\left( {A,\,\,B,\,\,C} \right) = \sum \left( {1,\,\,5,\,\,6} \right)$$
3
GATE EE 2006
MCQ (Single Correct Answer)
+1
-0.3
In the figure the current source is $$1\,\,\angle \,0\,A,$$ $$R = \,1\,\,\Omega ,$$ the impedances are $${Z_C} = - j\,\,\Omega ,$$ and $${Z_L} = 2\,j\,\,\Omega .$$ The Thevenin equivalent looking into the circuit across $$X-Y$$ is. GATE EE 2006 Electric Circuits - Network Theorems Question 13 English
A
$$\sqrt 2 \,\,\angle 0,\,\,V,\,\,\left( {1 + 2j} \right)\,\,\Omega $$
B
$$2\,\,\angle {45^ \circ },\,\,V,\,\,\left( {1 - 2j} \right)\,\,\Omega $$
C
$$2\,\,\angle {45^ \circ },\,\,V,\,\,\left( {1 + j} \right)\,\,\Omega $$
D
$$\sqrt 2 \,\,\angle {45^ \circ },\,\,V,\,\,\left( {1 + j} \right)\,\,\Omega $$
4
GATE EE 2006
MCQ (Single Correct Answer)
+2
-0.6
The parameters of the circuit shown in the figure are
$${R_i} = 1\,\,M\,\Omega ,\,\,{R_0} = 10\,\Omega ,\,\,A = {10^6}\,\,V/V.$$ If $${V_i} = 1\,\,\mu V,\,\,$$ the output voltage, input impedance and output impedance respectively are GATE EE 2006 Electric Circuits - Two Port Networks Question 3 English
A
$$1\,V,\infty ,\,\,10\,\Omega $$
B
$$1\,V,0,\,\,10\,\Omega $$
C
$$1\,\,V,0,\,\,\infty $$
D
$$10\,\,V,\,\,\infty ,\,\,10\,\Omega $$
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