The output of a logic gate is $$''1''$$ when all its inputs are at logic $$''0''.$$ The gate is either

The output $$f$$ of the $$4$$- to- $$1$$ $$MUX$$ shown in fig. is

For the ring counter shown in Fig. find the steady state sequence if the initial state of the counters is $$1110\,\,(i.e.,\,\,{Q_3},{Q_2},{Q_1},{Q_0} = 1110).$$ Determine the MOD number of the counter.

Among the following four, the slowest $$ADC$$ (analog-to-digital converter) is