$$(a)$$ Construct the truth table for the circuit given in Figure $${Q_1},{Q_2}$$ and $${Q_3}$$ are outputs and the clock pulses are the inputs. Unused $$JK$$ inputs are assumed to be at logic $$1.$$ All flip flops are reset at power $$ON$$.
$$(b)$$ Sketch the output waveforms at $${Q_1},{Q_2}$$ and $${Q_3}$$.
$$(c)$$ What function does this circuit perform.

A sinusoidal source of voltage $$V$$ and frequency $$f$$ is connected to a series circuit of variables resistance, $$R$$ and a fixed reactance, $$X.$$ The locus of the tip of the current phasor, $$I$$, as $$R$$ is varied from $$0$$ to $$\infty $$ is

Determine the impedance seen by the source $${V_s} = 24\angle {0^0}$$ in the network shown in Fig.

A circuit consisting of a single resistor $$R$$ and an inductor $$L$$ in series is driven by a $$25$$ $$V$$ $$rms,$$ $$50$$ $$Hz$$ sinusoidal voltage source. A capacitor is to be placed in parallel with the source to improve the power factor. Given that the average power dissipated in the $$R$$ is $$100$$ $$W$$ and that the reactive power delivered to the $$L$$ is $$75$$ $$VAR,$$ what value of $$C$$ will yield a $$0.9$$ $$p.f.$$ lagging as seen by the source?