In standard $$TTL$$ gates, the totem pole output stage is primarily used to

The open collector outputs of two$$2$$-inputs $$NAND$$ gates are connected to a common pull up resistor. If the input to the gates are $$P,Q$$ and $$R,S$$ respectively, the output is equal to

In the circuit shown in Figure, it is desired to have a constant direct current $$i(t)$$ through the ideal inductor $$L.$$ The nature of the voltage source $$v(t)$$ must be

The effective inductance of the circuit across the terminals $$A,B$$ in the Figure shown below is