In a digital combinational circuit with $$4$$ inputs $$(A, B, C, D),$$ it is required to obtain an output of logical $$1$$ only for the input combination

$$(A = 1; B = C = D = 0).$$ It is known that the following combinations of input are forbidden:

$$ABCD = 1010, 1011, 1100, 1101, 1110, 1111$$
Evaluate the logical expression for the output and realize the same with two input $$NAND$$ gates. Assume that complements of inputs are not available.

$$(a)$$ Construct the truth table for the circuit given in Figure $${Q_1},{Q_2}$$ and $${Q_3}$$ are outputs and the clock pulses are the inputs. Unused $$JK$$ inputs are assumed to be at logic $$1.$$ All flip flops are reset at power $$ON$$.
$$(b)$$ Sketch the output waveforms at $${Q_1},{Q_2}$$ and $${Q_3}$$.
$$(c)$$ What function does this circuit perform.

In standard $$TTL$$ gates, the totem pole output stage is primarily used to

The open collector outputs of two$$2$$-inputs $$NAND$$ gates are connected to a common pull up resistor. If the input to the gates are $$P,Q$$ and $$R,S$$ respectively, the output is equal to