1
GATE EE 1998
Subjective
+2
-0
Match the following GATE EE 1998 Digital Electronics - Combinational Circuits Question 10 English
2
GATE EE 1998
Subjective
+5
-0
In a digital combinational circuit with $$4$$ inputs $$(A, B, C, D),$$ it is required to obtain an output of logical $$1$$ only for the input combination

$$(A = 1; B = C = D = 0).$$ It is known that the following combinations of input are forbidden:

$$ABCD = 1010, 1011, 1100, 1101, 1110, 1111$$
Evaluate the logical expression for the output and realize the same with two input $$NAND$$ gates. Assume that complements of inputs are not available.

3
GATE EE 1998
Subjective
+5
-0
$$(a)$$ Construct the truth table for the circuit given in Figure $${Q_1},{Q_2}$$ and $${Q_3}$$ are outputs and the clock pulses are the inputs. Unused $$JK$$ inputs are assumed to be at logic $$1.$$ All flip flops are reset at power $$ON$$. GATE EE 1998 Digital Electronics - Sequential Circuits Question 5 English
$$(b)$$ Sketch the output waveforms at $${Q_1},{Q_2}$$ and $${Q_3}$$.
$$(c)$$ What function does this circuit perform.

4
GATE EE 1998
MCQ (Single Correct Answer)
+1
-0.3
In standard $$TTL$$ gates, the totem pole output stage is primarily used to
A
Increase the noise margin of the gate
B
Decrease the output switching delay
C
Facilitate a wired OR logic connection
D
Increase the output impedance of the circuit
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