1
GATE CSE 2006
MCQ (Single Correct Answer)
+1
-0.3
Consider three $$CPU$$-intensive process, which require $$10,20$$ and $$30$$ time units and arrive at times $$0,2$$ and $$6$$ respectively. How many context switches are needed if the operating system implements a shortest remaining time first scheduling algorithm? Do not count the context switches at time zero and at the end.
A
$$1$$
B
$$2$$
C
$$3$$
D
$$4$$
2
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
Consider three processes (process id $$0,1,2,$$ respectively) with compute time bursts $$2, 4,$$ and $$8$$ time units. All processes arrive at time zero. Consider the longest remaining time first $$(LRTF)$$ scheduling algorithm. In $$LRTF$$ ties are broken by giving priority to the process with the lowest process id. The average turn around time is
A
$$13$$ units
B
$$14$$ units
C
$$15$$ units
D
$$16$$ units
3
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
Consider three processes, all arriving at time zero, with total execution time of $$10,20,$$ and $$30$$ units, respectively. Each process spends the first $$20$$% of execution time doing $${\rm I}/O$$, the next $$70$$% of time doing computation, and the last $$10$$% of time doing $${\rm I}/O$$ again. The operating system uses a shortest remaining compute time first scheduling algorithm and scheduling a new process either when the running processes gets blocked on $${\rm I}/O$$ or when the running process finishes its compute burst. Assume that all $${\rm I}/O$$ operations can be overlapped as much as possible. For what percentage of time does the $$CPU$$ remain idle?
A
$$0$$%
B
$$10.6$$%
C
$$30.0$$%
D
$$89.4$$%
4
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
The atomic fetch-and-set x, y instruction unconditionally sets the memory location x to 1 and fetches the old value of x n y without allowing any intervening access to the memory location x. consider the following implementation of P and V functions on a binary semaphore S.

void P (binary_semaphore *s) { 

   unsigned y; 
   unsigned *x = &(s->value); 
   
   do { 

     fetch-and-set x, y; 

   } while (y); 
} 

void V (binary_semaphore *s) { 

   S->value = 0; 

} 
Which one of the following is true?
A
The implementation may not work if context switching is disabled in P
B
Instead of using fetch-and–set, a pair of normal load/store can be used
C
The implementation of V is wrong
D
The code does not implement a binary semaphore
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