1
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
Consider a Boolean function $$f(w, x, y, z).$$ Suppose that exactly one of its inputs is allowed to change at a time. If the function happens to be true for two input vectors $${i_1} = < {w_1},{x_1},{y_1},{z_1} > $$ and $${i_2} = < {w_2},{x_2},{y_2},{z_2} > ,$$ we would like the function to remain true as the input changes from $${i_1}$$ to $${i_2}$$ ($${i_1}$$ and $${i_2}$$ differ in exactly one bit position), without becoming false momentarily. Let $$f\left( {w,x,y,z} \right) = \sum {\left( {5,7,11,12,13,15} \right)} .$$ Which of the following cube covers of $$f$$ will entire that the required property is satisfied?
A
$$\overline w xz,\,wx\overline y ,\,x\overline y z,\,xyz,wyz$$
B
$$wxy,\,\overline w xz,\,wyz$$
C
$$wx\overline {yz} ,\,xz,\,w\overline x yz$$
D
$$wzy,\,wyz,\,wxz,\,\overline w xz,\,x\overline y z,\,xyz$$
2
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
Consider the circuit above. Which one of the following options correctly represents $$f(x,y,z)?$$ GATE CSE 2006 Digital Logic - Combinational Circuits Question 6 English
A
$$x\overline z + xy + \overline y z$$
B
$$x\overline z + xy + \overline {yz} $$
C
$$xz + xy + \overline {yz} $$
D
$$xz + x\overline y + \overline y z$$
3
GATE CSE 2006
MCQ (Single Correct Answer)
+1
-0.3
You are given a free running clock with a duty cycle of $$50$$% and a digital waveform $$f$$ which changes only at the negative edge of the clock. Which one of the following circuits (using clocked $$D$$ flip-flops) will delay the phase of $$f$$ by $${180^0}?$$
A
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 1
B
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 2
C
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 3
D
GATE CSE 2006 Digital Logic - Sequential Circuits Question 12 English Option 4
4
GATE CSE 2006
MCQ (Single Correct Answer)
+2
-0.6
Consider the circuit in the diagram. The $$ \oplus $$ operator represents $$EX$$-$$OR.$$ The $$D$$ flip-flops are initialized to zeros (cleared). GATE CSE 2006 Digital Logic - Sequential Circuits Question 10 English

The following data: $$100110000$$ is supplied to the ''data'' terminal in nine clock cycles. After that the values of $${q_2}{q_1}{q_0}$$ are

A
$$000$$
B
$$001$$
C
$$010$$
D
$$101$$
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