1
GATE EE 2010
MCQ (Single Correct Answer)
+2
-0.6
Which of the following circuits is a realization of the previous function $$F$$ $$?$$
A
GATE EE 2010 Digital Electronics - Minimization Question 4 English Option 1
B
GATE EE 2010 Digital Electronics - Minimization Question 4 English Option 2
C
GATE EE 2010 Digital Electronics - Minimization Question 4 English Option 3
D
GATE EE 2010 Digital Electronics - Minimization Question 4 English Option 4
2
GATE EE 2010
MCQ (Single Correct Answer)
+2
-0.6
The $$TTL$$ circuit shown in the figure is fed with the waveform $$X$$ (also shown). All gates have equal propagation delay of $$10$$ $$ns.$$ The output $$Y$$ of the circuit is GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English 1 GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English 2
A
GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 1
B
GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 2
C
GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 3
D
GATE EE 2010 Digital Electronics - Logic Families and Memories Question 2 English Option 4
3
GATE EE 2010
MCQ (Single Correct Answer)
+2
-0.6
When a $$''CALL$$ $$addr'$$ instruction is executed, the $$CPU$$ carries out the following sequential operations internally.

Note:
$$(R)$$ means content of register $$R$$
$$\left( {\left( R \right)} \right)$$ means content of memory locating pointed by $$R$$
$$PC$$ means Program Counter
$$SP$$ means Stack Pointer

A
$$\eqalign{ & \left( {SP} \right)\,\,\,\,\,\,\,incremented \cr & \left( {PC} \right)\,\,\,\,\,\, \leftarrow \left( {Addr} \right) \cr & \left( {\left( {SP} \right)} \right) \leftarrow \left( {PC} \right) \cr} $$
B
$$\eqalign{ & \left( {PC} \right)\,\,\,\,\,\, \leftarrow \left( {Addr} \right) \cr & \left( {\left( {SP} \right)} \right) \leftarrow \left( {PC} \right) \cr & \left( {SP} \right)\,\,\,\,\,\,\,incremented \cr} $$
C
$$\eqalign{ & \left( {PC} \right)\,\,\,\,\,\, \leftarrow \left( {Addr} \right) \cr & \left( {SP} \right)\,\,\,\,\,\,\,incremented \cr & \left( {\left( {SP} \right)} \right) \leftarrow \left( {PC} \right) \cr} $$
D
$$\eqalign{ & \left( {\left( {SP} \right)} \right) \leftarrow \left( {PC} \right) \cr & \left( {SP} \right)\,\,\,\,\,\,\,incremented \cr & \left( {PC} \right)\,\,\,\,\,\, \leftarrow \left( {Addr} \right) \cr} $$
4
GATE EE 2010
MCQ (Single Correct Answer)
+1
-0.3
If the electrical circuit of figure (b) is an equivalent of the coupled tank system of figure (a), then GATE EE 2010 Electric Circuits - Network Elements Question 46 English
A
A, B are resistances and C, D capacitances
B
A, C are resistances and B, D capacitances
C
A, B are capacitances and C, D resistances
D
A, C are capacitances and B, D resistances
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