AP EAPCET 2025 - 21st May Morning Shift | Semiconductor Devices and Logic Gates Question 19 | Physics

The voltage gains of two amplifiers connected in series are 8 and 12.5 . If the voltage of the input signal is $200 \mu \mathrm{~V}$, then the voltage of the output signal is

$50 \mu \mathrm{~V}$

$20 \mu \mathrm{~V}$

20 mV

50 mV

AP EAPCET 2024 - 23th May Morning Shift

MCQ (Single Correct Answer)

-0

In the diodes show in the diagrams, which one is reverse biased?

AP EAPCET 2024 - 23th May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 21 English Option 1

AP EAPCET 2024 - 23th May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 21 English Option 2

AP EAPCET 2024 - 23th May Morning Shift

MCQ (Single Correct Answer)

-0

$$ \text { The following configuration of gates is equivalent to } $$

AP EAPCET 2024 - 23th May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 20 English

NAND

$X O R$

AND

$O R$

AP EAPCET 2024 - 22th May Evening Shift

MCQ (Single Correct Answer)

-0

$$ \text { Truth table for the given circuit is } $$

AP EAPCET 2024 - 22th May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 22 English

$$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 0 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$

$$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 0 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$

$$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 1 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$

$$ \begin{array}{lll} \hline A & B & Y \\ \hline 0 & 0 & 0 \\ \hline 0 & 1 & 1 \\ \hline 1 & 0 & 1 \\ \hline 1 & 1 & 1 \\ \hline \end{array} $$

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