1
AP EAPCET 2025 - 23rd May Evening Shift
MCQ (Single Correct Answer)
+1
-0

If three logic gates are connected as shown in the figure, then the correct truth table of the circuit is

AP EAPCET 2025 - 23rd May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 5 English
A

$$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 1 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \\ \hline \end{array} $$

B

$$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 1 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \\ \hline \end{array} $$

C

$$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 0 \\ 0 & 1 & 0 \\ 1 & 0 & 0 \\ 1 & 1 & 1 \\ \hline \end{array} $$

D

$$ \begin{array}{|c|c|c|} \hline A & B & y \\ \hline 0 & 0 & 0 \\ 0 & 1 & 1 \\ 1 & 0 & 1 \\ 1 & 1 & 0 \\ \hline \end{array} $$

2
AP EAPCET 2025 - 23rd May Morning Shift
MCQ (Single Correct Answer)
+1
-0

The voltage gain and the current amplification factor of a transistor in common emitter configuration are 300 and 60 respectively. If the collector resistance is $5 \mathrm{k} \Omega$, then the base resistance is

A

$5 \mathrm{k} \Omega$

B

$25 \mathrm{k} \Omega$

C

$2 \mathrm{k} \Omega$

D

$1 \mathrm{k} \Omega$

3
AP EAPCET 2025 - 23rd May Morning Shift
MCQ (Single Correct Answer)
+1
-0

The logic gate equivalent to the circuit shown in the figure is

AP EAPCET 2025 - 23rd May Morning Shift Physics - Semiconductor Devices and Logic Gates Question 7 English
A

AND

B

NAND

C

NOR

D

$O R$

4
AP EAPCET 2025 - 22nd May Evening Shift
MCQ (Single Correct Answer)
+1
-0

When three NAND logic gates are connected as shown in the figure, then the logic gate equivalent to the circuit is

AP EAPCET 2025 - 22nd May Evening Shift Physics - Semiconductor Devices and Logic Gates Question 13 English
A

NOT

B

AND

C

$O R$

D

NOR

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