1
GATE EE 2009
MCQ (Single Correct Answer)
+2
-0.6
In the Fig. shown, all elements used are ideal. For time t<0, S1 remained closed and S2 open. At t=0, S1 is opened and S2 is closed.If the voltage VC2 across the capacitor C2 at t = 0 is zero, the voltage across the capacitor combiation at t = 0+ will be GATE EE 2009 Electric Circuits - Transient Response Question 26 English
A
1 V
B
2 V
C
1.5 V
D
3 V
2
GATE EE 2009
MCQ (Single Correct Answer)
+1
-0.3
The current through the $$2\,\,k\Omega $$ resistance in the circuit shown in Fig. is GATE EE 2009 Electric Circuits - Network Elements Question 14 English
A
$$0$$ $$mA$$
B
$$1$$ $$mA$$
C
$$2$$ $$mA$$
D
$$6$$ $$mA$$
3
GATE EE 2009
MCQ (Single Correct Answer)
+2
-0.6
The equivalent capacitance of the input loop of the circuit shown in below GATE EE 2009 Electric Circuits - Network Elements Question 6 English
A
$$2\,\,\mu F$$
B
$$100\,\,\mu F$$
C
$$200\,\,\mu F$$
D
$$4\,\,\mu F$$
4
GATE EE 2009
MCQ (Single Correct Answer)
+2
-0.6
For the circuit shown, find out the current flowing through the $$2\Omega $$ resistance. Also identify the changes to be made to double the current through the $$2\Omega $$ resistance. GATE EE 2009 Electric Circuits - Network Elements Question 5 English
A
$$\left( {5\,\,A;\,\,Put\,\,{V_S} = 20\,\,V} \right)$$
B
$$\left( {2\,\,A;\,\,Put\,\,{V_S} = 8\,\,V} \right)$$
C
$$\left( {5\,\,A;\,\,Put\,\,{{\rm I}_S} = 10\,\,A} \right)$$
D
$$\left( {7\,\,A;\,\,Put\,\,{{\rm I}_S} = 12\,\,A} \right)$$
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