1
GATE CSE 2018
Numerical
+2
-0
The instruction pipeline of a $$RISC$$ processor has the following stages: Instruction Fetch $$(IF),$$ Instruction Decode $$(ID),$$ Operand Fetch $$(OF),$$ Perform Operation $$(PO)$$ and Writeback $$(WB).$$ The $$IF,$$ $$ID,$$ $$OF$$ and $$WB$$ stages take $$1$$ clock cycle each for every instruction. Consider a sequence of $$100$$ instructions. In the $$PO$$ stage, $$40$$ instructions take $$3$$ clock cycles each, $$35$$ instructions take $$2$$ clock cycles each, and the remaining $$25$$ instructions take $$1$$ clock cycle each. Assume that there are no data hazards and no control hazards.

The number of clock cycles required for completion of execution of the sequence of instructions is ______.

Your input ____
2
GATE CSE 2018
MCQ (Single Correct Answer)
+2
-0.6
Consider the following processor design characteristics.

$$\,\,\,\,\,\,\,{\rm I}.\,\,\,\,\,$$ Register-to-register arithmetic operations only
$$\,\,\,\,\,{\rm I}{\rm I}.\,\,\,\,\,$$ Fixed-length instruction format
$$\,\,\,{\rm I}{\rm I}{\rm I}.\,\,\,\,\,$$ Hardwired control unit

Which of the characteristics above are used in the design of a $$RISC$$ processor?

A
$${\rm I}$$ and $${\rm II}$$ only
B
$${\rm I}$$$${\rm I}$$ and $${\rm III}$$ only
C
$${\rm I}$$ and $${\rm III}$$ only
D
$${\rm I},$$ $${\rm II}$$ and $${\rm III}$$ only
3
GATE CSE 2018
MCQ (Single Correct Answer)
+2
-0.6
The following are some events that occur after a device controller issues an interrupt while process $$L$$ is under execution.

$$(P)$$ The processor pushes the process status of $$L$$ onto the control stack.
$$(Q)$$ The processor finishes the execution of the current instruction.
$$(R)$$ The processor executes the interrupt service routine.
$$(S)$$ The processor pops the process status of $$L$$ from the control stack.
$$(T)$$ The processor loads the new PC value based on the interrupt.

Which one of the following is the correct order in which the events above occur?

A
$$QPTRS$$
B
$$PTRSQ$$
C
$$TRPQS$$
D
$$QTPRS$$
4
GATE CSE 2018
MCQ (Single Correct Answer)
+2
-0.6
Let $$G$$ be a simple undirected graph. Let $${T_D}$$ be a depth first search tree of $$G.$$ Let $${T_B}$$ be a breadth first search tree of $$G.$$ Consider the following statements.

$$(I)$$ No edge of $$G$$ is a cross edge with respect to $${T_D}.$$ ($$A$$ cross edge in $$G$$ is between
$$\,\,\,\,\,\,\,\,$$ two nodes neither of which is an ancestor of the other in $${T_D}.$$)
$$(II)$$ For every edge $$(u,v)$$ of $$G,$$ if $$u$$ is at depth $$i$$ and $$v$$ is at depth $$j$$ in $${T_B}$$, then
$$\,\,\,\,\,\,\,\,\,\,\,$$ $$\left| {i - j} \right| = 1.$$

Which of the statements above must necessarily be true?

A
$$I$$ only
B
$$II$$ only
C
Both $$I$$ and $$II$$ only
D
Neither $$I$$ nor $$II$$
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