1
GATE CSE 2004
MCQ (Single Correct Answer)
+2
-0.6
Consider a System with a two-level paging scheme in which a regular memory access takes $$150$$ nanoseconds, and servicing a page fault takes $$8$$ milliseconds. An average instruction takes $$100$$ nanoseconds of $$CPU$$ time, and two memory accesses. The $$TLB$$ hit ratio is $$90$$% and the page fault rate is one in every $$10,000$$ instructions. What is the effective average instruction execution time?
A
$$645$$ nanoseconds
B
$$1050$$ nanoseconds
C
$$1215$$ nanoseconds
D
$$1230$$ nanoseconds
2
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
The minimum number of page frames that must be allocated to a running process in a virtual memory environment is determined by.
A
the instruction set architecture
B
page size
C
physical memory size
D
number of processes in memory
3
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
Which of the following addressing modes are suitable for program relocation at run time?
$$1.$$ Absolute addressing
$$2.$$ Based addressing
$$3.$$ Relative addressing
$$4.$$ Indirect addressing
A
$$1$$ & $$4$$
B
$$1$$ & $$2$$
C
$$2$$ & $$3$$
D
$$1,2$$ & $$4$$
4
GATE CSE 2004
MCQ (Single Correct Answer)
+1
-0.3
Consider a program $$P$$ that consists of two source modules $${M_1}$$ and $${M_2}$$ contained in two different files. If $${M_1}$$ contains a reference to a function defined in $${M_2}$$, the reference will be resolved at.
A
Edit-time
B
Compile-time
C
Link-time
D
Load-time
EXAM MAP
Medical
NEETAIIMS
Graduate Aptitude Test in Engineering
GATE CSEGATE ECEGATE EEGATE MEGATE CEGATE PIGATE IN
Civil Services
UPSC Civil Service
Defence
NDA
Staff Selection Commission
SSC CGL Tier I
CBSE
Class 12