1
GATE EE 2017 Set 2
MCQ (Single Correct Answer)
+1
-0.3
For a $$3$$ -input logic circuit shown below, the output $$Z$$ can be expressed as GATE EE 2017 Set 2 Digital Electronics - Boolean Algebra Question 1 English
A
$$Q + \overline R $$
B
$$P\overline Q + R$$
C
$$\overline Q + R$$
D
$$P + \overline Q + R$$
2
GATE EE 2017 Set 2
Numerical
+2
-0
For the synchronous sequential circuit shown below, the output $$Z$$ is zero for the initial conditions $${Q_A}{Q_B}{Q_C} = Q{'_A}Q{'_B}Q{'_C} = 100.$$ GATE EE 2017 Set 2 Digital Electronics - Sequential Circuits Question 7 English

The minimum number if clock cycles after which the output $$Z$$ would again become zero is _____________.

Your input ____
3
GATE EE 2017 Set 2
MCQ (Single Correct Answer)
+2
-0.6
For the network given in figure below, the Thevenin's voltage Vab is GATE EE 2017 Set 2 Electric Circuits - Network Theorems Question 24 English
A
-1.5 V
B
-0.5 V
C
0.5 V
D
1.5 V
4
GATE EE 2017 Set 2
Numerical
+1
-0
The initial charge in the 1 F capacitor present in the circuit shown is zero. The energy in joules transferred from the DC source until steady state condition is reached equals ______. (Give the answer up to one decimal place.) GATE EE 2017 Set 2 Electric Circuits - Transient Response Question 34 English
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