1
GATE EE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
Which of the following logic circuits is a realization of the function $$F$$ whose karnaugh map is shown in figure GATE EE 2014 Set 1 Digital Electronics - Minimization Question 3 English
A
GATE EE 2014 Set 1 Digital Electronics - Minimization Question 3 English Option 1
B
GATE EE 2014 Set 1 Digital Electronics - Minimization Question 3 English Option 2
C
GATE EE 2014 Set 1 Digital Electronics - Minimization Question 3 English Option 3
D
GATE EE 2014 Set 1 Digital Electronics - Minimization Question 3 English Option 4
2
GATE EE 2014 Set 1
MCQ (Single Correct Answer)
+1
-0.3
A cascade of three identical modulo -$$5$$ counters has an over all modulus of
A
$$5$$
B
$$25$$
C
$$125$$
D
$$625$$
3
GATE EE 2014 Set 1
MCQ (Single Correct Answer)
+2
-0.6
An output device is interfaced with $$8$$ bit microprocessor $$8085$$$$A.$$ The interfacing circuit is shown in figure GATE EE 2014 Set 1 Digital Electronics - Microprocessor Question 5 English

The interfacing circuit makes use of $$3$$ line to $$8$$ line decoder having $$3$$ enable lines $${E_1}\,\,\overline E {}_2,$$ $$\,\overline E {}_3$$. The address of the device is

A
$${50_H}$$
B
$${5000_H}$$
C
$${A0_H}$$
D
$${A000_H}$$
4
GATE EE 2014 Set 1
Numerical
+1
-0
The three circuit elements shown in the figure are part of an electric circuit. The total power absorbed by the three circuit elements in watts is ________________. GATE EE 2014 Set 1 Electric Circuits - Network Elements Question 49 English
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