1
GATE CSE 2003
MCQ (Single Correct Answer)
+1
-0.3
In a system with $$32$$ bit virtual addresses and $$1$$ $$KB$$ page size, use of one-level page tables for virtual to physical address translation is not practical because of
A
The large amount of internal fragmentation
B
The large amount of external fragmentation
C
The large memory overhead in maintaining page tables.
D
The large computation overhead in the translation process
2
GATE CSE 2003
MCQ (Single Correct Answer)
+1
-0.3
Using a larger block size in a fixed block size file system leads to
A
better disk throughput but poorer disk space utilization
B
better disk throughput and better disk space utilization
C
poorer disk throughput but better disk space utilization
D
poorer disk throughput and poorer disk space utilization
3
GATE CSE 2003
MCQ (Single Correct Answer)
+2
-0.6
A uni-processor computer system only has two processes, both of which alternate $$10$$ $$ms$$ $$CPU$$ bursts with $$90$$ $$ms$$ $${\rm I}/O$$ bursts. Both the processes were created at nearly the same time. The $${\rm I}/O$$ of both processes can proceed in parallel. Which of the following scheduling strategies will result in the least $$CPU$$ utilization (over a long period of time) for this system?
A
First come First served scheduling
B
Shortest remaining time first scheduling
C
Static priority scheduling with different priorities for the two processes
D
Round robin scheduling with a time quantum of $$5$$ $$ms.$$
4
GATE CSE 2003
MCQ (Single Correct Answer)
+2
-0.6
Suppose we want to synchronize two concurrent processes P and Q using binary semaphores S and T. The code for the processes P and Q is shown below.

Process P:

while(1){
  W:
  Print '0';
  Print '0';
  X:
}

Process Q:

while(1){
  Y:
  Print '1';
  Print '1';
  Z:
}
Synchronization statements can be inserted only at points W, X, Y, and Z.

Which of the following will ensure that the output string never contains a substring of the form 01n0 or 10n1 where n is odd?

A
P(S) at W, V(S) at X, P(T) at Y, V(T) at Z, S and T initially 1
B
P(S) at W, V(T) at X, P(T) at Y, V(S) at Z, S and T initially 1
C
P(S) at W, V(S) at X, P(S) at Y, V(S) at Z, S initially 1
D
V(S) at W, V(T) at X, P(S) at Y, P(T) at Z, S and T initially 1
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