1
GATE CSE 2016 Set 1
MCQ (Single Correct Answer)
+2
-0.6
Consider a carry lookahead adder for adding two $$n$$-bit integers, built using gates of fan-in at most two. The time to perform addition using this adder is
A
$$\Theta \left( 1 \right)$$
B
$$\Theta \left( {\log \left( n \right)} \right)$$
C
$$\Theta \left( {\sqrt n } \right)$$
D
$$\Theta \left( n \right)$$
2
GATE CSE 2016 Set 1
MCQ (Single Correct Answer)
+2
-0.6
Consider the two cascaded $$2$$-to-$$1$$ multiplexers as shown in the figure. GATE CSE 2016 Set 1 Digital Logic - Combinational Circuits Question 7 English

The minimal sum of products form of the output $$X$$ is

A
$$\overline P \overline Q + PQR$$
B
$$\overline P Q + QR$$
C
$$PQ + \overline P \overline Q R$$
D
$$\overline Q \overline R + PQR$$
3
GATE CSE 2016 Set 1
Numerical
+1
-0
We want to design a synchronous counter that counts the sequence $$0-1-0-2-0-3$$ and then repeats. The minimum number of $$J-K$$ flip-flops required to implement this counter is _________.
Your input ____
4
GATE CSE 2016 Set 1
MCQ (Single Correct Answer)
+1
-0.3
Consider the Boolean operator $$ \ne $$ with the following properties:
$$x \ne 0 = x,\,\,x \ne 1 = \overline x ,\,\,x \ne x = 0$$ and $$x \ne \overline x = 1.$$ Then $$x \ne y$$ is equivalent to
A
$$x\overline y + \overline x y$$
B
$$x\overline y + \overline x \overline y $$
C
$$\overline x y + xy$$
D
$$xy + \overline x \overline y $$
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