Three logic gates are connected as shown in the figure. If the inputs are $A=1, B=0$ and $C=1$, then the values of $y_1, y_2$ and $y_3$ respectively are

The graph between the input voltage $\left(V_i\right)$ and the output voltage ( $V_o$ ) of a transistor connected in common emitter configuration is shown in the figure. The active, saturation and cutoff regions of the transistor are respectively

Which of the following logic gates is a universal gate?

According to a graph drawn between the input and output voltages of a transistor connected in common emitter configuration, the region in which transistor acts as a switch is