A $$3$$-input $$2$$-output priority encoder has the following truth table where $$'X'$$ indicate don't care conditions. Realize the logic using $$NAND$$ gates and inverters.

In a microprocessor, the address of the next instruction to be executed, is stored in

The range of address for which the memory chip shown in Figure, will be selected is .... to .........

Energy stored in a capacitor over a cycle, when excited by an $$a.c.$$ source is