1
GATE CSE 2019
Numerical
+2
-0.67
Consider that 15 machines need to be connected in a LAN using 8-port Ethernet switches. Assume that these switches do not have any separate uplink ports. The minimum number of switches needed is _____.
Your input ____
2
GATE CSE 2019
MCQ (Single Correct Answer)
+1
-0.33
Which of the following protocol pairs can be used to send and retrieve e-mails (in that order)?
A
IMAP, SMTP
B
SMTP, POP3
C
IMAP, POP3
D
SMTP, MIME
3
GATE CSE 2019
MCQ (Single Correct Answer)
+1
-0.33
The chip select logic for a certain DRAM chip in a memory system design is shown below. Assume that the memory system has 16 address lines denoted by A15 to A0. What is the range of addresses (in hexadecimal) of the memory system that can get enabled by the chip select (CS) signal? GATE CSE 2019 Computer Organization - Memory Interfacing Question 13 English
A
C800 to CFFF
B
C800 to C8FF
C
DA00 to DFFF
D
CA00 to CAFF
4
GATE CSE 2019
MCQ (Single Correct Answer)
+1
-0.33
A certain processor uses a fully associative cache of size 16 kB. The cache block size is 16 bytes. Assume that the main memory is byte addressable and uses a 32-bit address. How many bits are required for the Tag and the Index fields resectively in the addresses generated by the processor?
A
28 bits and 4 bits
B
24 bits and 4 bits
C
24 bits and 0 bits
D
28 bits and 0 bits
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