An $$8KB$$ direct-mapped write-back cache is organized as multiple blocks, each of size $$32$$-bytes. The processor generates $$32$$-bit addresses. The cache controller maintains the tag information for each cache block comprising of the following.
$$\,\,\,\,$$$$1$$ Valid bit
$$\,\,\,\,$$$$1$$ Modified bit

As many bits as the minimum needed to identify the memory block mapped in the cache.

What is the total size of memory needed at the cache controller to store meta-data (tags) for the cache?

On a non-pipe-lined sequential processor, a program segment, which is a part of the interrrupt service routine, is given to transfer $$500$$ bytes from an $${\rm I}/O$$ device to memory. Initialize the address register Initialize the count to $$500$$
$$LOOP:$$ Load a byte from device Store in memory at address given by address register $$$\eqalign{ & Increment\,\,\,the\,\,\,address\,\,register \cr & Decrement\,\,\,the\,\,count \cr & If\,\,\,count!\,\,\, = 0\,\,\,go\,\,\,to\,\,\,LOOP \cr} $$$

Assume that each statement in this program is equivalent to a machine instruction which takes one clock cycle to execute if it is non- load/store instruction. The load-store instructions take two clock cycles to execute.

The designer of the system also has an alternate approach of using the $$DMA$$ controller to implement the same transfer. The $$DMA$$ controller requires $$20$$ clock cycles for initialization and other overheads. Each $$DMA$$ transfer cycle takes two clock cycles to transfer one byte of data from the device to the memory.

What is the approximate speed up when the $$DMA$$ controller based design is used in place of the interrupt driven program based input-output?

A computer handles several interrupt sources of which of the following are relevant for this question.

$$ * \,\,\,\,\,\,\,\,\,\,\,$$ Interrupt from $$CPU$$ temperature sensor (raises interrupt if $$CPU$$
$$\,\,\,\,\,\,\,\,\,\,\,\,\,\,$$ temperature is too high)
$$ * \,\,\,\,\,\,\,\,\,\,\,$$ Interrupt from Mouse (raises interrupt if the mouse is moved or a button is
$$\,\,\,\,\,\,\,\,\,\,\,\,\,\,\,$$pressed)
$$ * \,\,\,\,\,\,\,\,\,\,\,$$ Interrupt from Keyboard (raises interrupt when a key is pressed or released)
$$ * \,\,\,\,\,\,\,\,\,\,\,$$ Interrupt from Hard Disk (raises interrupt when a disk read is completed)

Which one of these will be handled at the $$HIGHEST$$ priority?

A max-heap is a heap where the value of each parent is greater than or equal to the value of its children. Which of the following is a max-heap?