1
GATE CSE 2011
MCQ (Single Correct Answer)
+1
-0.3
The simplified $$SOP$$ (Sum of product) form of the Boolean expression
$$\left( {P + \overline Q + \overline R } \right).\left( {P + \overline Q + R} \right).\left( {P + Q + \overline R } \right)$$ is
A
$$\left( {\overline P .Q + \overline R } \right)$$
B
$$\left( {P + \overline Q .\overline R } \right)$$
C
$$\left( {\overline P .Q + R} \right)$$
D
$$\left( {P.Q + R} \right)$$
2
GATE CSE 2011
MCQ (Single Correct Answer)
+1
-0.3
Which one of the following circuits is NOT equivalent to a $$2$$-input $$XNOR$$ (exclusive NOR) gate
A
GATE CSE 2011 Digital Logic - Boolean Algebra Question 45 English Option 1
B
GATE CSE 2011 Digital Logic - Boolean Algebra Question 45 English Option 2
C
GATE CSE 2011 Digital Logic - Boolean Algebra Question 45 English Option 3
D
GATE CSE 2011 Digital Logic - Boolean Algebra Question 45 English Option 4
3
GATE CSE 2011
MCQ (Single Correct Answer)
+2
-0.6
Consider the following circuit involving three Dtypes flip-flops used in a certain type of Counter configuration. GATE CSE 2011 Digital Logic - Sequential Circuits Question 18 English

If at some instance prior to the occurrence of the clock edge, $$P, Q$$ and $$R$$ have a value $$0,1$$ and $$0$$ respectively, what shall be the value of $$PQR$$ after the clock edge?

A
$$000$$
B
$$001$$
C
$$010$$
D
$$011$$
4
GATE CSE 2011
MCQ (Single Correct Answer)
+2
-0.6
Consider the following circuit involving three Dtypes flip-flops used in a certain type of Counter configuration. GATE CSE 2011 Digital Logic - Sequential Circuits Question 19 English

If all the flip-flops were reset to $$0$$ at power on, what is the total number of distinct outputs (states) represented by $$PQR$$ generated by the counter?

A
$$3$$
B
$$4$$
C
$$5$$
D
$$6$$
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