1
GATE CSE 2011
MCQ (Single Correct Answer)
+2
-0.6
Consider a network with five nodes, N1 to N5, as shown below.
The network uses a Distance Vector Routing protocol. Once the routes have stabilized, the distance vectors at different nodes are as following
N1 : ( 0, 1, 7, 8, 4 )
N2 : ( 1, 0, 6, 7, 3 )
N3 : ( 7, 6, 0, 2, 6 )
N4 : ( 8, 7, 2, 0, 4 )
N5 : ( 4, 3, 6, 4, 0 )
The cost of link N2 - N3 reduces to 2 in (both directions). After the next round of updates, what will be the new distance vector at node, N3?
2
GATE CSE 2011
MCQ (Single Correct Answer)
+1
-0.3
Consider different activities related to email:
m1: Send an email from a mail client to a mail server
m2: Download an email from mailbox server to a mail client
m3: Checking email in a web browser
3
GATE CSE 2011
MCQ (Single Correct Answer)
+1
-0.3
A layer-4 firewall (a device that can look at all protocol headers up to the transport layer) CANNOT
4
GATE CSE 2011
MCQ (Single Correct Answer)
+2
-0.6
An $$8KB$$ direct-mapped write-back cache is organized as multiple blocks, each of size $$32$$-bytes. The processor generates $$32$$-bit addresses. The cache controller maintains the tag information for each cache block comprising of the following.
$$\,\,\,\,$$$$1$$ Valid bit
$$\,\,\,\,$$$$1$$ Modified bit
$$\,\,\,\,$$$$1$$ Valid bit
$$\,\,\,\,$$$$1$$ Modified bit
As many bits as the minimum needed to identify the memory block mapped in the cache.
What is the total size of memory needed at the cache controller to store meta-data (tags) for the cache?
Paper analysis
Total Questions
Algorithms
6
Compiler Design
1
Computer Networks
4
Computer Organization
5
Data Structures
2
Database Management System
4
Digital Logic
4
Discrete Mathematics
10
Operating Systems
5
Programming Languages
3
Software Engineering
4
Theory of Computation
4
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