1
GATE CSE 1996
Subjective
+5
-0
Consider the synchronous sequential circuit in fig. GATE CSE 1996 Digital Logic - Sequential Circuits Question 11 English 1

(a) Draw a state diagram which is implemented by the circuit. Use the following names for the states corresponding to the values of flip-flops as given below.

GATE CSE 1996 Digital Logic - Sequential Circuits Question 11 English 2

(b) Given that the initial state of the circuit is $${S_4},$$ identify the set of states which are not reachable.

2
GATE CSE 1996
Subjective
+5
-0
A logic network has two data inputs $$A$$ and $$B,$$ and two control inputs $${C_0}$$ and $${C_1}$$. It implements the function $$F$$ according to the following Table. GATE CSE 1996 Digital Logic - Boolean Algebra Question 24 English

Implement the circuit using one $$4$$ to $$1$$ Multiplexor, one $$2$$-input Exclusive $$OR$$ gate, one $$2$$-input $$AND$$ gate, one $$2$$-input $$OR$$ gate and one Inverter.

3
GATE CSE 1996
MCQ (Single Correct Answer)
+2
-0.6
What is the equivalent Boolean expression in product-of-sums form for the Karnaugh map given in fig? GATE CSE 1996 Digital Logic - K Maps Question 8 English
A
$$B\,\overline D + \overline B \,D$$
B
$$\left( {B + \overline C + D} \right)\left( {\overline B + C + \overline D } \right)$$
C
$$\left( {B + D} \right)\left( {\overline B + \overline D } \right)$$
D
$$\left( {B + \overline D } \right)\left( {\overline B + D} \right)$$
4
GATE CSE 1996
Subjective
+1
-0
Let $$A = \left[ {\matrix{ {{a_{11}}} & {{a_{12}}} \cr {{a_{21}}} & {{a_{22}}} \cr } } \right]\,\,$$ and $$B = \left[ {\matrix{ {{b_{11}}} & {{b_{12}}} \cr {{b_{21}}} & {{b_{22}}} \cr } } \right]\,\,$$ be
two matrices such that $$AB=1.$$
Let $$C = A\left[ {\matrix{ 1 & 0 \cr 1 & 1 \cr } } \right]$$ and $$CD=1.$$
Express the elements of $$D$$ in terms of the elements of $$B.$$
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