1
GATE CSE 1996
MCQ (Single Correct Answer)
+2
-0.6
Consider the circuit in Fig. Which has a four bit binary number $${b_3}\,{b_2}\,{b_1}\,{b_0}\,$$ as input and a five bit binary number $${d_3}\,{d_2}\,{d_1}\,{d_0}\,$$ as output. The circuit implements: GATE CSE 1996 Digital Logic - Combinational Circuits Question 13 English
A
Binary to Hex conversion
B
Binary to $$BCD$$ conversion
C
Binary to grey code conversion
D
Binary to radix -$$12$$ conversion
2
GATE CSE 1996
MCQ (Single Correct Answer)
+2
-0.6
Consider the circuit in fig shown $$f$$ implements GATE CSE 1996 Digital Logic - Combinational Circuits Question 12 English
A
$$\overline A \overline B C + \overline A B\overline C + ABC$$
B
$$A+B+C$$
C
$$A \oplus B \oplus C$$
D
$$AB + BC + CA$$
3
GATE CSE 1996
Subjective
+5
-0
Consider the synchronous sequential circuit in fig. GATE CSE 1996 Digital Logic - Sequential Circuits Question 13 English 1

(a) Draw a state diagram which is implemented by the circuit. Use the following names for the states corresponding to the values of flip-flops as given below.

GATE CSE 1996 Digital Logic - Sequential Circuits Question 13 English 2

(b) Given that the initial state of the circuit is $${S_4},$$ identify the set of states which are not reachable.

4
GATE CSE 1996
Subjective
+5
-0
A logic network has two data inputs $$A$$ and $$B,$$ and two control inputs $${C_0}$$ and $${C_1}$$. It implements the function $$F$$ according to the following Table. GATE CSE 1996 Digital Logic - Boolean Algebra Question 27 English

Implement the circuit using one $$4$$ to $$1$$ Multiplexor, one $$2$$-input Exclusive $$OR$$ gate, one $$2$$-input $$AND$$ gate, one $$2$$-input $$OR$$ gate and one Inverter.

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