1
GATE CSE 2010
MCQ (Single Correct Answer)
+2
-0.6

Consider a network with 6 routers R1 to R6 connected with links having weights as shown in the following diagram

GATE CSE 2010 Computer Networks - Routing Algorithm Question 7 English

All the routers use the distance vector based routing algorithm to update their routing tables. Each router starts with its routing table initialized to contain an entry for each neighbour with the weight of the respective connecting link. After all the routing tables stabilize, how many links in the network will never be used for carrying any data?

A
4
B
3
C
2
D
1
2
GATE CSE 2010
MCQ (Single Correct Answer)
+2
-0.6

Consider a network with 6 routers R1 to R6 connected with links having weights as shown in the following diagram

GATE CSE 2010 Computer Networks - Routing Algorithm Question 6 English Suppose the weights of all unused links in the previous question are changed to 2 and the distance vector algorithm is used again until all routing tables stabilize. How many links will now remain unused?
A
$$0$$
B
1
C
2
D
3
3
GATE CSE 2010
MCQ (Single Correct Answer)
+1
-0.3
A main memory unit with a capacity of $$4$$ megabytes is built using $$1M \times 1$$-bit $$DRAM$$ chips. Each $$DRAM$$ chip has $$1K$$ rows of cells with $$1K$$ cells in each row. The time taken for a single refresh operation is $$100$$ nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit is
A
$$100$$ nanoseconds
B
$$100 * {2^{10}}$$ nanoseconds
C
$$100 * {2^{20}}$$ nanoseconds
D
$$3200 * {2^{20}}$$ nanoseconds
4
GATE CSE 2010
MCQ (Single Correct Answer)
+2
-0.6
A computer system has an $$L1$$ cache, an $$L2$$ cache, and a main memory unit connected as shown below. The block size in $$L1$$ cache is $$4$$ words. The block size in $$L2$$ cache is $$16$$ words. The memory access times are $$2$$ nanoseconds, $$20$$ nanoseconds and $$200$$ nanoseconds for $$L1$$ cache, $$L2$$ cache and main memory unit respectively. GATE CSE 2010 Computer Organization - Memory Interfacing Question 22 English

When there is a miss in both $$L1$$ cache and $$L2$$ cache, first a block is transferred from main memory to $$L2$$ cache, and then a block is transferred from $$L2$$ cache to $$L1$$ cache.
What is the total time taken for these transfers?

A
$$222$$ nanoseconds
B
$$888$$ nanoseconds
C
$$902$$ nanoseconds
D
$$968$$ nanoseconds
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