In the cycle stealing mode of DMA, one word of data is transferred between an I/O device and main memory in a stolen cycle

For bulk data transfer, the burst mode of DMA has a higher throughput than the cycle stealing mode

Programmed I/O mechanism has a better CPU utilization than the interrupt driven I/O mechanism

The CPU can start executing an interrupt service routine faster with vectored interrupts than with non-vectored interrupts

In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction

In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction

Forwarding cannot prevent all pipeline stalls

Forwarding does not require any extra hardware to retrieve the data from the pipeline stages

A read miss in WBC never evicts a dirty block

A read miss in WTC never triggers a write back operation of a cache block to main memory

A write hit in WBC can modify the value of the dirty bit of a cache block

A write miss in WTC always writes the victim cache block to main memory before loading the missed block to the cache