1
GATE CSE 2015 Set 1
Numerical
+2
-0
Consider a non-pipelined processor with a clock rate of 2.5 gigahertz and average cycles per instruction of four. The same processor is upgraded to a pipelined processor with five stages; but due to the internal pipeline delay, the clock speed is reduced to 2 gigahertz. Assume that there are no stalls in the pipeline. The speed up achieved in this pipelined processor is_________.
Your input ____
2
GATE CSE 2015 Set 1
MCQ (Single Correct Answer)
+1
-0.3
For computers based on three-address instruction formats, each address field can be used to specify which of the following:

(S1) A memory operand
(S2) A processor register
(S3) An implied accumulator register

A
Either S1 or S2
B
Either S2 or S3
C
Only S2 and S3
D
All of S1, S2 and S3
3
GATE CSE 2015 Set 1
MCQ (Single Correct Answer)
+2
-0.6
Let G = (V, E) be a simple undirected graph, and s be a particular vertex in it called the source. For $$x \in V$$, let d(x) denote the shortest distance in G from s to x. A breadth first search (BFS) is performed starting at s. Let T be the resultant BFS tree. If (u, v) is an edge of G that is not in T, then which one of the following CANNOT be the value of $$d\left( u \right) - d\left( v \right)$$?
A
-1
B
0
C
1
D
2
4
GATE CSE 2015 Set 1
MCQ (Single Correct Answer)
+1
-0.3
The height of a tree is the length of the longest root-to-leaf path in it. The maximum and minimum number of nodes in a binary tree of height 5 are
A
63 and 6, respectively
B
64 and 5, respectively
C
32 and 6, respectively
D
31 and 5, respectively
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