1
GATE CSE 2013
MCQ (Single Correct Answer)
+2
-0.6
In an IPv4 datagram, the M bit is 0, the value of HLEN is 10, the value of total length is 400 and the fragment offset value is 300. The position of the datagram, the sequence numbers of the first and the last bytes of the payload, respectively are
A
Last fragment, 2400 and 2789
B
First fragment, 2400 and 2759
C
Last fragment, 2400 and 2759
D
Middle fragment, 300 and 689
2
GATE CSE 2013
MCQ (Single Correct Answer)
+1
-0.3
Using public key cryptography, X adds a digital signature σ to message M, encrypts, and sends it to Y, where it is decrypted. Which one of the following sequences of keys is used for the operations?
A
Encryption: X's private key followed by Y's private key;
Decryption: X’s public key followed by Y’s public key
B
Encryption: X's private key followed by Y's public key;
Decryption: X's public key followed by Y's private key
C
Encryption: X's public key followed by Y's private key;
Decryption: Y's public key followed by X's private key
D
Encryption: X's private key followed by Y's public key;
Decryption: Y's private key followed by X's public key
3
GATE CSE 2013
MCQ (Single Correct Answer)
+1
-0.3
In a $$k$$-way set associative cache, the cache is divided into $$v$$ sets, each of which consists of $$k$$ lines. The lines of a set are placed in sequence one after another. The lines in set $$s$$ are sequenced before the lines in set $$(s+1).$$ The main memory blocks are numbered $$0$$ onwards. The main memory block numbered $$j$$ must be mapped to any one of the cache lines from
A
$${\left( {j\,\,\bmod \,\,v} \right)^ * }k\,\,$$ to $${\left( {j\,\,\bmod \,\,v} \right)^ * }k\, + \,\,\,\,\,\,\left( {k - 1} \right)$$
B
$${\left( {j\,\,\bmod \,\,v} \right)}\,\,$$ to $$\left( {j\,\,\bmod \,\,v} \right)\, + \,\left( {k - 1} \right)$$
C
$${\left( {j\,\,\bmod \,\,k} \right) }\,\,$$ to $$\left( {j\,\,\bmod \,\,k} \right)\, + \,\left( {v - 1} \right)$$
D
$${\left( {j\,\,\bmod \,\,k} \right)^ * }v\,\,$$ to $${\left( {j\,\,\bmod \,\,k} \right)^ * }\,v + \,\left( {v - 1} \right)$$
4
GATE CSE 2013
MCQ (Single Correct Answer)
+2
-0.6
A $$RAM$$ chip has a capacity of $$1024$$ words of $$8$$ bits each $$\left( {1K \times 8} \right).$$ The number of $$2 \times 4$$ decoders with enable line needed to construct a $$16K \times 16\,\,RAM$$ from $$1K \times 8\,\,RAM$$ is
A
$$4$$
B
$$5$$
C
$$6$$
D
$$7$$
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